recently i have started learning assembly. i am having problems understanding the addressing schemes can any body please pls pls pls help me with that. i have tried asking my teachers and consult some books on assembly but nothing had worked
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recently i have started learning assembly. i am having problems understanding the addressing schemes can any body please pls pls pls help me with that. i have tried asking my teachers and consult some books on assembly but nothing had worked
hello neemitjamwal
i understand man assembly can be at times very simple and at other times very confusing to newbesQuote:
recently i have started learning assembly
regarding addressing schemes hope this helps
Immediate Addressing
Under this addressing scheme, the actual operand D is A, the content of the operand field: i.e.
D = A
This addressing mode is used to initialise the value of a variable. The advantage of this mode is that. no additional memory accesses are required for executing the instruction. However, as the size of instruction and operand field are limited, the type of data specified under this addressing scheme also get restricted.
Direct Addressing
Under this addressing scheme, the content A of the operand field specify EA, the effective address of the operand: i.e.
EA -- A and
D = (EA)
The second statement implies that the data is stored in the memory location specified by effective address. In this addressing scheme only one memory reference is required. This simple addressing scheme provides a limited address space. If the address field has n bits then the address space available is 2n memory locations.
Indirect Addressing
Under this addressing scheme the effective address EA and the contents of the operand field are related by
EA = (A) and
D = (EA)
The disadvantage of this addressing scheme is that it requires two memory references to fetch the operand. The first memory reference is used to fetch the effective address from the memory and second for fetching the operand using EA. In this scheme the addressed space is determined by word length. In many machines multiple level of indirection may be used. where EA= (... (A) ...) gives the relationship between A and EA. In such a case a bit (generally the most significant bit) in the word address specifies the indirection. If this bit is '1', then the contents of the word represent the address of the address of the operand and if it is 'O' then the contents of the field represent the address of the operand. If the size of the address field is n then the address space available under multiple indirection addressing scheme is 2n-1
Register Addressing
In this addressing scheme, the instruction specifies the address of the register containing the operand:
EA = R
D = (EA)
Please note that EA here is a register address and not a memory address. The advantage here is that only a few bits are needed to address the operand. For example, for a machine having 16 general purpose registers only 4 bits are needed to address a register.
In some cases the address of the register containing the operand may not be explicitly specified but is understood implicitly. This is generally the case where one of the operands is in a special register called the Accumulator.
Register access is faster than memory access. So register addressing provides faster instruction execution. However, this statement is valid only if the registers are employed efficiently. For example, if an operand is moved into a register and processed only once and then returned to memory, then no saving occurs, however if an operand is used repeatedly after bringing into register then we have saved few memory references. Thus the task of using register efficiently deals with the task of finding what operand values should be kept in registers such that memory references are minimised. Normally, this task is done by a compiler of a high level language while translating the program to machine language.
Register Indirect Addressing
Under this addressing scheme the operand field specifies the registers which contains the address of the operand.
EA= (R) and
D = (EA)
The address capability of register indirect addressing scheme is determined by the size of the register.
Displacement Addressing
This is a very powerful addressing scheme. It combines both the direct addressing as well as the register indirect addressing schemes. Here the content A of the operand field is related to EA by
EA = A+(R)
The register address R may be specified explicitly or implicitly in the instruction. Depending upon the use and the implementation this address scheme may be known as:
Indexed Addressing Scheme: This addressing scheme is generally used to address the consecutive locations of memory (which may store the elements of an array). The interpretation of the expression EA = A+(R) is as follows:
The contents of the operand field A is taken to be the address of the initial or the reference location (or the first element of array). The contents of register R gives the displacement with respect to the reference location. For example, to address of an element Bi of an array B1, B2,....Bn, with each element of the array stored in two consecutive locations, and the starting address of the array being 101, the operand field A shall contain the number 101 and the register R will contain the value of the expression (i- 1) x 2. Thus, for the first element of the array the register will contain 0. For addressing 5th element of the array, the A=101 where as register will contain (5- 1) x 2 = 8. Therefore, the address of 5th element of array B5=101+8=109. The Bs, however, is stored in location 109 and 110. To address any other element of the array, changing the content of the register (let us call it index register) will suffice. As the index register are used for iterative applications, therefore, an index register is incremented or decremented after each reference to it. In several systems this operation is performed automatically during the course of an instruction cycle. This feature is known as autoindexing. Autoindexing can be autoincrementing or autodecrementing. The choice of register to be used as an index register differs from machine to machine. Some machine employ general purpose registers for this purpose while other machines may specify special purpose registers referred to as index registers.
Another related addressing scheme which couples the indirect addressing with indexing are also utilised by several systems. Here, there are two possibilities:
Indexing is performed after indirection (postindexing):
In this scheme the memory address specified by opcode address the location that contains a direct address which is to be indexed. That is:
DA = (A)
EA = DA +(R)
D = (EA)
( DA is Direct address )
Indexing performed before indirection (Preindexing):
This means that the address generated after doing indexing is the address of the location of operand. That is
IA = A+ (R)
EA = (IA)
D = (EA)
( IA is indexed address )
In normal circumstances both pre-indexing and post-indexing are not used in an instruction set simultaneously.
Base Addressing Scheme: This addressing scheme is generally employed to relocate the programs in the memory specially in a multiprogramming environment Relocation is discussed in details in course 2, block 2. Here the register R, referred to as Base Register contains the initial address in the memory (referred to as the base address) of the program segment being relocated. The operand field A contains the displacement of an instruction or data with respect to the base address. In this case:
EA = A+ (B) ; D = (EA)
(B) refers to the contents of a base register B.
The contents of the base register may be changed in the privileged mode only, i.e. in the user mode the contents of the base register cannot be changed.
The base addressing scheme while on one hand provides the enhanced addressable space on the other hand it provides protection of users from one another.
In a base addressing scheme the address of an index addressed element is given by:
EA = A + (B) + (I), where B and I are base register and index register respectively.
Like index register a base register may be a general purpose register or a special register reserved for base addressing.
Relative Addressing Scheme: In this addressing scheme, the register R is the program counter (PC) containing the address of the current instruction being executed. The operand field A contain the displacement (positive or negative) of an instruction or data with respect to the current instruction. This addressing scheme have advantages if the memory references are nearer to the current instruction being executed.
Stack Addressing Scheme
This is not a very common addressing scheme. In this addressing scheme, the address of an operand is not specified explicitly. It is implied. The operand is found on the top of a stack. In some machines the top two elements of stack and top of stack pointer is kept in the CPU registers, while rest of the elements may reside in the memory.
this sure has thank uQuote:
regarding addressing schemes hope this helps
just one more thing about Wilkes control unit design. could u explain a bit
In 1951 Wilkes had proposed the use of microprogram control unit. In Wilkes design a microinstruction has two major components:
Control field and
address field
The control field indicates the control lines which are to be activated and the address field provides the address of the next microinstruction to be executed
The control memory in this control is organised as a program logic array like matrix made of diodes, a simple electronic device. This is Partial matrix and consist Of two components, the control signals and the address of next microinstruction. The control memory access register (CMAR) can be loaded by the instruction code register or by the address field of the control matrix. The control memory address register on taking an input from the instruction register provides a 3 bit address to the 3 X 8 decoder. Ibis is
an entry point address to the control memory. On the basis of this address, decoder activates one of the eight output lines (horizontal). This activated line, in turn, generates
control signals and the address of the next microinstruction to be executed. This address is once again fed to the CMAR resulting in activation of another control line and address
field. This cycle is repeated till the execution of the instruction is achieved. For example, in the given figure, instruction register's op-code 000 causes the decoder to have an
entry address for a machine instruction in control memory at line 000. The decoder activates the lines in the sequence given below:(Please note this is valid only for the
diagram given here which is only an indicative example and not a complete Wilkes Control Unit.)
Decode line activated
Control signals generated
Address of next microinstruction
000
Cl, C3, C5, C7
001
001
C2, C4, C5
010
010
Cl, C3
011
011
C2, C5
?
Please note the '?' above. How do we get the address of the next microinstructions to be executed on activating the decode line 011? We have two possible options in the figure 1. A typical requirement of a control unit is that it must respond to an external control condition. Thus, making conditional jumps possible within a microprogram. This is
demonstrated in the Wilkes control of the figure 1. The external condition switch causes the control unit to follow one of the two available paths:
EITHER
011
C2, C5
If external condition is true then 110
110
C2, C4, C7
111
111
C0, C1, C2, C3, C4, C5, C7
This may cause loading of next instruction in IR.
OR
011
C2, C5
If external condition is false then 100
100
C1, C2, C3, C5
101
101
C1, C6, C7
111
111
C0, C1, C2, C3, C4, C5, C7
This may cause loading of next instruction in IR.
heres the diagram
hey neemitjamwal
"IBM PC Assembly Language and programming by peter Abel" is good book i think u should use it