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October 16th, 2004, 07:07 AM
#1
I'm sorry to say, but I don't have hopes for extra Cache and less MHz to be the cure for solving heat problems. Think of it like this: L2 Cache runs at the same speed as the core. Like the 3.8GHz 2MB L2 example the article gave. Currently Prescotts are running with 1MB of L2 cache at the speed of the processor. At 3.2GHz they are pretty heated. Think of adding 2x more Cache size on the die, and having all of that running at 3.8GHz. I don't know how big the L2 cache is compared to the rest of the die, but IIRC 512kb was a pretty costly chunk of silicone (at least for 130nm). And I'd imagine that it running that fast will produce some heat...
But Intel's change of strategy is sure a showing that they have the balls to turn their hugely successful microprocessor business 180 degrees out of the GHz race. Props to them for it 
Also, I think Moore's Law was reinterperted at some point in time to have something to do with the features on a processor. I think more Cache and Dual Core are improvements that keep Moore's Law true today.
Besides, it appears that Intel is working on the 45nm process as we speak: http://www.eet.com/semi/news/showArt...cleId=50500191
LEUVEN, Belgium — IMEC has demonstrated the integration of fully-silicided NiSi gates on top of high-k gate stacks, claiming a potential breakthrough that would enable development of a 45-nm manufacturing process.
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Intel Corp. claims to have developed a high-k gate stack, but has declined to identify the materials. Intels' high-k gate insulator is thought to be hafnium-based, something it would be using in common with most other research groups. It is not known whether Intel is using a dual metal gate or a FUSI scheme.
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